logic gate
英 [ˈlɒdʒɪk ɡeɪt]
美 [ˈlɑːdʒɪk ɡeɪt]
n. 逻辑门，逻辑闸(以两种方式之一对所输入数据进行输出的电子开关)
牛津词典
noun
- 逻辑门，逻辑闸（以两种方式之一对所输入数据进行输出的电子开关）
an electronic switch that reacts in one of two ways to data that is put into it. A computer performs operations by passing data through a very large number of logic gates .
英英释义
noun
- a computer circuit with several inputs but only one output that can be activated by particular combinations of inputs
双语例句
- Use the quantum logic gate for implementing multi-purpose quantum cloning machine.
利用通用量子门实现多用途量子克隆机的方案。 - Based on the I-U characteristics of single-electron transistor ( SET) and the concepts of CMOS digital circuits design, a sort of logic gate is proposed.
基于单电子晶体管（SET）的I＿U特性和CMOS数字电路设计思想，提出了一类互补型SET逻辑门。 - Each particle in the system acts like the logic gate of a computer.
系统中每个粒子的作用类似电脑里的逻辑闸。 - Generally speaking, the video codec in portable system can be realized by two ways: Pure software way of DSP ( digital signal processor) and pure hardware way of ASIC or FPGA ( programmable logic gate array).
一般来说视频编解码器在便携式系统上的实现有以下两种方式：纯软件的DSP（数字信号处理）方式、纯硬件的ASIC（专用集成芯片）或者FPGA（可编程逻辑门阵列）。 - Based on the dual-rail logic, a cascadable parallel binary logic gate was, proposed.
基于双轨逻辑，本文提出一种可级联的并行二值逻辑门。 - Since any logic gate can be constructed by two-qubit controlled not gates ( CN gate) and one qubit rotation gate ( R gate), the realization of the CN and R gates has been studied extensively.
任意量子门都可以由二比特控制非门（CN门）和单比特旋转门（R门）组成。因此，人们致力于研究如何实现CN门和R门。 - Threshold Logic Gate ( TLG) is receiving much attention because of its logic versatility and functionally complete.
阈值逻辑门由于具有强大的逻辑功能且独自构成完备集而备受关注。 - Based on the double parameter logic gate control, a new fuzzy control logic is presented and a two-stage fuzzy logic controller based on wheel angle acceleration is designed.
文中以双参数逻辑门限控制方法为基础提出了新的模糊控制逻辑，设计了基于车轮角加速度的两级模糊防抱控制器； - This paper introduces a new structure of numeral multilier: using one-level logic gate structure to realize array numeral multiplier, and using cmos technology to realize 8 × 8 ultraspeed array numeral multiplier with a new structure.
本文介绍了一种新的数码乘法器结构：采用一级逻辑门结构实现阵列式数码乘法器，并采用CMOS工艺技术实现新结构的8×8位超高速阵列式数码乘法器。 - The special Flip-Flop, combination logic gate and improved topology of Prescaler, enable the Prescaler to intensify the low power-high speed tradeoff.
其中，采用了特殊的D触发器和组合逻辑门结构，改进了预置数分频器结构，能够使分频器工作在低功耗、高速度之间有比较好的折衷。